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Le projet FosFor dans Xcell Journal, Xcell Issue
73, Fourth Quarter
2010 (lien)
Colloque STIC du 5 au 7 janvier 2010
Centre des congrès de
la Cité des Sciences et de l'Industrie à Paris
§ Poster (pdf)
§ Présentation du
projet (pdf)
Revues internationales
[R1] Enhacing reconfigurable platform
programmability for synchronous dataflow applications, Gantel Laurent, Khiar Amel, Miramond Benoît, Benkhelifa Mohamed
El Amine, Kessal Lounis,
Lemonnier Fabrice, Lerhun Jimmy, ACM Transaction on Reconfigurable
Technology and Systems, to appear in 2012
[R2] Ikbel Belaid,
Fabrice Muller, and Maher Benjemaa.
Static scheduling of periodic hardware tasks with precedence and deadline
constraints on reconfigurable hardware devices. Special Issue in EURASIP
International Journal of Reconfigurable Computing (IJRC), February 2011.
[R3] L. Devaux, S. B. Sassi, S. Pillement, D. Chillet, and D. Demigny. Flexible interconnection network for dynamically
and partially reconfigurable architectures. International Journal on
Reconfigurable Computing, vol 2010(article ID
390545):15 pages, 2010.
[R4] Ikbel
Belaid, Fabrice
Muller, and Maher Benjemaa. New three-level
resource management enhancing quality of off-line hardware task placement
on fpga. EURASIP International Journal of
Reconfigurable Computing (IJRC), April 2010.
Ouvrages ou chapitres d’ouvrage
[O1] Ikbel Belaid,
Fabrice Muller, and Maher Benjemaa.
Algorithm-Architecture Matching for Signal and Image Processing
: "A New Three-Level Strategy for Off-line Placement of
Hardware Tasks on Partially and Dynamically Reconfigurable
Hardware", volume 73. Springer, 2011.
[O2] Fabrice Muller, Jimmy Le Rhun, Fabrice Lemonnier, Benoît Miramond, and Ludovic Devaux. A flexible operating system for dynamic
applications. XCell Journal, Issue 73, Fourth
Quarter 2010 2010.
Publications internationales
[CI-1] S.Narayanan, D.Chillet,
S.Pillement, and I.Sourdis.
Hardware os communication service and dynamic
hardware os communication service and dynamic
memory management for rsocs. In Reconfig, Cancun, Mexico, Novembre
2011.
[CI-2] S.Narayanan, L.Devaux,
D.Chillet, S.Pillement,
and I.Sourdis. Communication service for
hardware tasks executed on dynamic and partially reconfigurable
substrate. In VLSI-SOC, Hong-Kong, Septembre
2011.
[CI-3] I. Belaid, F. Muller, and M. Benjemaa. Schedulers-driven approach for dynamic
placement/scheduling of multiple dags onto sopcs. In IEEE International Symposium on Rapid
System Prototyping (RSP). IEEE, May 2011 2011.
[CI-4] B. Ouni, I. Belaid,
F. Muller, and M. Benjemaa. Placement of
hardware tasks on fpga using the bees algorithm. In International Conference on
Pervasive and Embedded Computing and Communication Systems (PECCS 2011), Vilamoura, Algarve, Portugal, March 2011.
[CI-5] Ikbel Belaid,
Fabrice Muller, and Maher Benjemaa.
Optimal static scheduling of real-time dependent tasks on reconfigurable
hardware devices. In IEEE International Conference on Communications,
Computing and Control Applications (CCCA 2011), Hammamet,
Tunisia, March 2011. IEEE.
[CI-6] Dataflow Programming Model For Reconfigurable Computing, Gantel L., Khiar A., Miramond B., Benkhelifa, M.
E. A., Lemonnier F., Kessal
L., in 6th International Workshop on Reconfigurable Communication-centric
Systems-on-Chip (ReCoSoC), France, 2011 [CI-7]
L. Devaux, S. Pillement,
D. Chillet, and D. Demigny.
Mesh and fat-tree comparison for dynamically reconfigurable applications.
In Workshop on Reconfigurable Communication-centric Systems on Chip (ReCoSoC), pages 173–176, Karlsruhe, Germany, 2010.
[CI-8] L. Devaux, S. Pillement, D. Chillet, and
D. Demigny. Os services for reconfigurable system-on-chip communications. In
Design of Circuits and Integrated Systems, Lanzarote,
Spain, Mai 2010.
[CI-9] L. Devaux, S. Pillement, D. Chillet, and
D. Demigny. R2noc : dynamically reconfigurable routers for flexible networks on chip.
In International Conference on ReConFigurable
Computing and FPGAs, ReConFig’10, Cancun, Mexico, Decembre
2010.
[CI-10] Clément Foucher,
Fabrice Muller, and Alain Giulieri.
Exploring FPGAs capability to host a HPC design. In IEEE CAS 28th Norchip Conference (Norchip
2010), pages 1–4, Tampere Finlande, November
2010.
[CI-11] I. Belaid, F. Muller, and M. Benjemaa. New three-level resource management for
off-line placement of hardware tasks on reconfigurable devices. In
Reconfigurable Communication-centric Systems on Chip (ReCoSoC
2010), Karlsruhe, Germany, May 2010.
[CI-12] Task Migration in MPSoC
Reconfigurable Platforms, Gantel L., Layouni S., Benkhelifa M.
E. A., Verdier F., Dans
Proceedings of - Conference on Design and Architectures for Signal and
Image Processing (DASIP'09), France (2009)
[CI-13] Multiprocessor Task Migration Implementation in a
Reconfigurable Platform, Gantel L., Layouni S., Benkhelifa M.
E. A., Verdier F., Chauvet
S., Dans Proceedings of - IEEE International
Conference on ReConFigurable Computing and
FPGAs (ReConFig'09), Mexique (2009)
[CI-14] L. Devaux, D. Chillet, S. Pillement, and
D. Demigny. Flexible communication support for dynamically reconfigurable fpga. In Proc. of the Southern Programmable Logic
Conference, pages 65–70, Sao-Carlos, Brazil, april
2009.
[CI-15] L. Devaux, S. B. Sassi, S. Pillement, D. Chillet, and D. Demigny. Draft: Flexible interconnection network for
dynamically reconfigurable architectures. Sydney, Australia, december 2009. Proc. of the IEEE International
Conference on Field-Programmable Technology (FPT’09).
[CI-16] I. Belaid, F. Muller, and M. Benjemaa. Off-line placement of reconfigurable zones
and off-line mapping of hardware tasks on fpga.
In Design and Architectures for Signal and Image Processing (DASIP),
Sophia-Antipolis, France, 22-24 September 2009.
[CI-17] I. Belaid, F. Muller, and M. Benjemaa. Off-line placement of hardware tasks on fpga. In 19th IEEE International Conference on Field
Programmable Logic and Application (FPL’09), pages 591–595, Prague, Czech
Republic, September 2009. IEEE.
[CN-1] Relecture de bitstream appliquée à la relocation de tâches
matérielles dans les SoC reconfigurables, De
Melo F., Gantel L., Sachaux
R., GDR SOCSIP, France (2010)
[CN-2] Ikbel Belaid,
Fabrice Muller, and Maher Benjemaa.
Off-line placement/scheduling of hardware tasks on reconfigurable
devices. In
Colloque GDR SoC/SiP,
Cergy-Pontoise, France, 9-11 juin 2010. (poster)
[CN-3] Virtualisation
des communications pour une plateforme reconfigurable dynamiquement et
hétérogène, A. khiar, B. Miramond,
F. Verdier, ETIS
[CN-4] L. Devaux, S. B. Sassi, S. Pillement, D. Chillet, and D. Demigny. R ́eseau d’interconnexion flexible pour architecture
reconfigurable dynamiquement et partiellement. In Proc. of the Symposium en Architecture de machines (SympA’13),
Toulouse, France, September 2009.
[CN-5] Ikbel Belaid,
Fabrice Muller, Maher Benjemaa,
and Alain Giulieri. Off-line placement of
hardware tasks on fpga. In Colloque
GDR SoC/SiP, Paris-Orsay, France, 10-11-12 juin
2009 (poster).
[CN-6] Clément Foucher, Fabrice
Muller, and Alain Giulieri. Implémentation d’un système d’exploitation
matériel compatible rtems. In Colloque GDR SoC/SiP, Paris-Orsay, France, 10-11-12 juin
2009.
[CN-7] Bassem Ouni,
Fabrice Muller, and Maher Benjemaa.
Placement
et ordonnancement des tâches matérielles sur des zones reconfigurables en
utilisant le bees algorithm.
In Colloque GDR SoC/SiP,
Paris-Orsay, France, 10-11-12 juin 2009. (poster)
[CN-8] Ikbel
Belaid, Fabrice Muller, Alain Giulieri, Virtualisation de l’ordonnancement matériel/logiciel
sur plateforme reconfigurable dynamiquement, Colloque GDR SoC/SiP (download
)
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